1. Field of the Invention
The present invention is related to integrated circuit fabrication. More specifically, the present invention is related to a method and apparatus for placing assist features in a mask layout using an aerial-image intensity model.
2. Related Art
The dramatic improvements in semiconductor integration densities in recent years have largely been achieved through corresponding improvements in semiconductor manufacturing technologies.
One such semiconductor manufacturing technology involves placing assist features on a mask layout. Note that assist features can be printing (e.g., super-resolution assist features) or non-printing (e.g., sub-resolution assist features). In either case, these assist features are meant to improve the lithographic performance of the lines intended to be printed on the wafer.
Present techniques for placing assist features use a rule-based methodology in which assist features are placed based on combinations of feature width and spacing parameters.
Unfortunately, optical behavior with off-axis illumination is complex and requires an elaborate set of assist feature synthesis rules. As a result, creating and maintaining a robust set of placement rules that are guaranteed to work properly for arbitrary configurations is very difficult. In addition, maintaining rules in a manufacturing environment is very expensive.
Hence, what is needed is a method and apparatus for placing assist features in a mask layout without the problems described above.